A low-voltage low-power sigma-delta modulator with improved performance in overload condition

A 4/sup th/-order sigma-delta modulator is presented that offers significantly improved stability and SNR when the input is overloaded, compared to conventional single-bit modulators. The circuit combines the high linearity of a single-bit architecture with the increased stability of a multi-bit converter. Fabricated in a 0.13-/spl mu/m CMOS logic process, it draws 208 /spl mu/A from a 1.25 V nominal supply. Clocked at 1.5 MHz, the input bandwidth is 150 Hz-11 kHz, with an SNR of 84 dB.