Analysis of bandpass sigma-delta modulator architectures

This work analyses two architectures of bandpass sigma delta modulators, in order to find their sensitivity against operational amplifier finite voltage gain, having in mind a switched capacitor realization of both architectures. Expressions for the ideal signal to noise ratio and dynamic range of both architectures are found, as well as a model of the degradation of the mentioned parameters due to finite values of the voltage gain. The proposed model is then compared with nonlinear high level simulations including the effect of finite voltage gain.