Home  |   Login  |   Logout  |   Access Information  |   Alerts  |   Purchase History  |   Cart  |   Sitemap  |   Help   
 
CrossRef Search
BROWSE SEARCH IEEE XPLORE GUIDE SUPPORT
You requested this document:
1. Efficient VLSI parallel algorithm for Delaunay triangulation on orthogonal tree network in two and three dimensions
Saxena, S.; Bhatt, P.C.P.; Prasad, V.C.;
Computers, IEEE Transactions on
Volume 39,  Issue 3,  March 1990 Page(s):400 - 404
Abstract:

An algorithm with worst case time complexity O(log2 N) in two dimensions and O(m1/2 log N) in three dimensions with N input points and m as the number of tetrahedra in triangulation is given. Its AT2 VLSI complexity on Thompson's logarithmic delay model, (1983) is O(N2log6 N) in two dimensions and O(m2N log4 N) in three dimensions
Abstract | Full Text: PDF(556 KB)    IEEE JNL
 
» Key
IEEE JNL IEEE Journal or Magazine
IEE JNL IEE Journal or Magazine
IEEE CNF IEEE Conference Proceeding
IEE CNF IEE Conference Proceeding
IEEE STD IEEE Standard
 
 
Indexed by IEE Inspec
© Copyright 2009 IEEE – All Rights Reserved