Home  |   Login  |   Logout  |   Access Information  |   Alerts  |   Purchase History  |   Cart  |   Sitemap  |   Help   
 
CrossRef Search
BROWSE SEARCH IEEE XPLORE GUIDE SUPPORT
You requested this document:
1. A Survey of Automated Techniques for Formal Software Verification
D'Silva, V.; Kroening, D.; Weissenbacher, G.;
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Volume 27,  Issue 7,  July 2008 Page(s):1165 - 1178
Abstract:

The quality and the correctness of software are often the greatest concern in electronic systems. Formal verification tools can provide a guarantee that a design is free of specific flaws. This paper surveys algorithms that perform automatic static analysis of software to detect programming errors or prove their absence. The three techniques considered are static analysis with abstract domains, model checking, and bounded model checking. A short tutorial on these techniques is provided, highlighting their differences when applied to practical problems. This paper also surveys tools implementing these techniques and describes their merits and shortcomings.
Abstract | Full Text: PDF(494 KB)    IEEE JNL
 
» Key
IEEE JNL IEEE Journal or Magazine
IEE JNL IEE Journal or Magazine
IEEE CNF IEEE Conference Proceeding
IEE CNF IEE Conference Proceeding
IEEE STD IEEE Standard
 
 
Indexed by IEE Inspec
© Copyright 2009 IEEE – All Rights Reserved