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A low-cost cryptographic processor for security embedded system
Ronghua Lu; Jun Han; Xiaoyang Zeng; Qing Li; Lang Mai; Jia Zhao;
Design Automation Conference, 2008. ASPDAC 2008. Asia and South Pacific
21-24 March 2008
Page(s):113
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114
Abstract:
A low-cost cryptographic processor for security embedded system is presented in this paper. The processor, without any assistance of dedicated cryptographic coprocessors, is scalable and very efficient for popular cryptographic algorithms such as RSA/ECC, AES, Hash, etc. Based on SMIC 0.18 um standard CMOS technology, the core circuit of the test chip has only about 32 k gates, and a max frequency of 200 MHz, under which the 1024-bit RSA algorithm takes only 150 ms and the throughout of AES reaches 256 Mbits/s.
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