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1. A novel CMOS logic style with data independent power consumption
Aigner, M.; Mangard, S.; Menicocci, R.; Olivieri, M.; Scotti, G.; Trifiletti, A.;
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
23-26 May 2005 Page(s):1066 - 1069 Vol. 2
Abstract:

We propose a novel dynamic CMOS logic style to protect security devices against power attacks. The logic is based on signals with 3 possible states and operates with a power consumption ideally independent of both the logic values and the sequence of data. We have designed a set of logic gates and a flip-flop and compared those to static complementary CMOS implementations in terms of correlation between data and power consumption, speed, area, and total power dissipation.
Abstract | Full Text: PDF(264 KB)    IEEE CNF
 
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