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A fully integrated 900-MHz CMOS wireless receiver with on-chip RF and IF filters and 79-dB image rejection
Chunbing Guo; Chi-Wa Lo; Yu-Wing Choi; Hsu, I.; Kan, T.; Leung, D.; Chan, A.; Luong, H.C.;
Solid-State Circuits, IEEE Journal of
Volume 37,
Issue 8,
Aug. 2002
Page(s):1084
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1089
Abstract:
A monolithic 900-MHz CMOS wireless receiver with on-chip RF and IF filters and a fully integrated fractional-N synthesizer is presented. Implemented in a standard 0.5-μm CMOS process and without any off-chip component, the complete receiver has a measured image rejection of 79 dB, a sensitivity of -90 dBm, an IIP3 of -24 dBm, and a noise figure of 22 dB with a power of 227 mW and a chip area of 5.7 mm2. The synthesizer achieves a phase noise of -118 dBc/Hz at 600 kHz offset and a settling time of less than 150 μs.
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