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		<title><![CDATA[ Circuits and Systems Magazine, IEEE - new TOC ]]></title>
		<link>http://ieeexplore.ieee.org</link>
		<description>TOC Alert for Publication# 7384 </description>
		<year>2012</year>
		<month>February </month>
		<day>10</day>
		<item>
			<title><![CDATA[[Front Cover]]]></title>
			<link><![CDATA[http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=6035846&arnumber=6083535]]></link>
			<description><![CDATA[ ]]></description>
			<pubDate><![CDATA[Fourthquarter  2011]]></pubDate>
			<guid><![CDATA[http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=6035846&arnumber=6083535]]></guid>
			<volume>11</volume>
			<issue>4</issue>
			<startPage>C1</startPage>
			<endPage>C1</endPage>
			<fileSize>2306</fileSize>
			<authors><![CDATA[]]></authors>
		</item>
		<item>
			<title><![CDATA[[Table of Contents]]]></title>
			<link><![CDATA[http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=6035846&arnumber=6083542]]></link>
			<description><![CDATA[ ]]></description>
			<pubDate><![CDATA[Fourthquarter  2011]]></pubDate>
			<guid><![CDATA[http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=6035846&arnumber=6083542]]></guid>
			<volume>11</volume>
			<issue>4</issue>
			<startPage>1</startPage>
			<endPage>2</endPage>
			<fileSize>253</fileSize>
			<authors><![CDATA[]]></authors>
		</item>
		<item>
			<title><![CDATA[[From the Editor]]]></title>
			<link><![CDATA[http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=6035846&arnumber=6035850]]></link>
			<description><![CDATA[We live in an era of computerization and inter-netization]]></description>
			<pubDate><![CDATA[Fourthquarter  2011]]></pubDate>
			<guid><![CDATA[http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=6035846&arnumber=6035850]]></guid>
			<volume>11</volume>
			<issue>4</issue>
			<startPage>4</startPage>
			<endPage>6</endPage>
			<fileSize>468</fileSize>
			<authors><![CDATA[Chen, G.(.;]]></authors>
		</item>
		<item>
			<title><![CDATA[Exploiting the Body of MOS Devices for High Performance Analog Design]]></title>
			<link><![CDATA[http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=6035846&arnumber=6035851]]></link>
			<description><![CDATA[With the progressive reduction of MOS transistors minimum dimension and their associated supply voltages, the body terminal-considered in the past as an exclusive source of unwanted second order effects-has been advantageously exploited by digital designers and is also becoming an attractive opportunity for the implementation of high-performance analog integrated circuits. In this paper, we will discuss some techniques that can be applied to many conventional analog building blocks in order to improve their performance (such as gain and linearity) and/or decreasing their supply demand. Experimental prototypes have been implemented and tested, showing that the proposed techniques are promising candidates for enhanced analog IC design in nanoscale technologies.]]></description>
			<pubDate><![CDATA[Fourthquarter  2011]]></pubDate>
			<guid><![CDATA[http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=6035846&arnumber=6035851]]></guid>
			<volume>11</volume>
			<issue>4</issue>
			<startPage>8</startPage>
			<endPage>23</endPage>
			<fileSize>4375</fileSize>
			<authors><![CDATA[Monsurro, P.;Pennisi, S.;Scotti, G.;Trifiletti, A.;]]></authors>
		</item>
		<item>
			<title><![CDATA[Architecture Optimizations for the RSA Public Key Cryptosystem: A Tutorial]]></title>
			<link><![CDATA[http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=6035846&arnumber=6035849]]></link>
			<description><![CDATA[The Rivest Shamir Adleman (RSA) cryptosystem, named after its creators, is one of the most popular public key cryptosystems. The RSA cryptosystem has been utilized for e-commerce, various forms of authentication, and virtual private networks. The importance of high security and faster implementations paved the way for RSA crypto-accelerators, hardware implementations of the RSA algorithm. This work consists of describing various approaches to implementing RSA crypto-accelerators based on the &#x201C;textbook&#x201D; version of the RSA cryptosystem and comparing their area requirements. Many of the techniques described here have applications elsewhere such as in digital signal processing and error correcting codes. This paper presents the four fundamental architectures: the bit- serial squaring architecture, two bit-serial systolic array modular multiplication architectures, and the interleaved modular multiplication architecture.]]></description>
			<pubDate><![CDATA[Fourthquarter  2011]]></pubDate>
			<guid><![CDATA[http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=6035846&arnumber=6035849]]></guid>
			<volume>11</volume>
			<issue>4</issue>
			<startPage>24</startPage>
			<endPage>34</endPage>
			<fileSize>1145</fileSize>
			<authors><![CDATA[Cohen, A.E.;Parhi, K.K.;]]></authors>
		</item>
		<item>
			<title><![CDATA[Teaching Memristors to EE Undergraduate Students [Class Notes]]]></title>
			<link><![CDATA[http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=6035846&arnumber=6035847]]></link>
			<description><![CDATA[Generations of electrical engineers have learned that there are three fundamental passive two-terminal circuit elements: resistor, capacitor, and inductor. Nevertheless, this apparently immovable situation changed in 2008 when Nature published an article on the memristor, which was proved to be the fourth fundamental circuit element. Since then, researchers have devoted time and effort to find how this device may possibly change the future of electronics. It is time then to introduce the memristor in EE undergraduate courses, but how? The great majority of works on memristor published so far have been aimed at experienced researchers and not at young students. The goal of this paper is providing an original point of view on this issue and describing a simple approach to memristor which is suitable to be used in EE undergraduate courses.]]></description>
			<pubDate><![CDATA[Fourthquarter  2011]]></pubDate>
			<guid><![CDATA[http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=6035846&arnumber=6035847]]></guid>
			<volume>11</volume>
			<issue>4</issue>
			<startPage>36</startPage>
			<endPage>44</endPage>
			<fileSize>1137</fileSize>
			<authors><![CDATA[Pazienza, G.E.;Albo-Canals, J.;]]></authors>
		</item>
		<item>
			<title><![CDATA[Another Look at Linear Compensator Design: A Classic Control Problem Revisited [Class Notes]]]></title>
			<link><![CDATA[http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=6035846&arnumber=6035848]]></link>
			<description><![CDATA[We revisit the classical linear compensator and briefly discuss some recent advances in analytical compensator design. We show that some tedious graph manipulations in compensator design procedures can be relieved by using the newly achieved analytical formulas.]]></description>
			<pubDate><![CDATA[Fourthquarter  2011]]></pubDate>
			<guid><![CDATA[http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=6035846&arnumber=6035848]]></guid>
			<volume>11</volume>
			<issue>4</issue>
			<startPage>45</startPage>
			<endPage>50</endPage>
			<fileSize>697</fileSize>
			<authors><![CDATA[Fei-Yue Wang;]]></authors>
		</item>
		<item>
			<title><![CDATA[[2011 Index]]]></title>
			<link><![CDATA[http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=6035846&arnumber=6083541]]></link>
			<description><![CDATA[This index covers all technical items - papers, correspondence, reviews, etc. - that appeared in this periodical during the year, and items from previous years that were commented upon or corrected in this year. Departments and other items may also be covered if they have been judged to have archival value. The Author Index contains the primary entry for each item, listed under the first author's name. The primary entry includes the coauthors' names, the title of the paper or other item, and its location, specified by the publication abbreviation, year, month, and inclusive pagination. The Subject Index contains entries describing the item under all appropriate subject headings, plus the first author's name, the publication abbreviation, month, and year, and inclusive pages. Note that the item title is found only under he primary entry in the Author Index.]]></description>
			<pubDate><![CDATA[Fourthquarter  2011]]></pubDate>
			<guid><![CDATA[http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=6035846&arnumber=6083541]]></guid>
			<volume>11</volume>
			<issue>4</issue>
			<startPage>52</startPage>
			<endPage>54</endPage>
			<fileSize>149</fileSize>
			<authors><![CDATA[]]></authors>
		</item>
		<item>
			<title><![CDATA[[Advertisers Index]]]></title>
			<link><![CDATA[http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=6035846&arnumber=6083529]]></link>
			<description><![CDATA[The Advertisers Index contained in this issue is compiled as a service to our readers and advertisers: the publisher is not liable for errors or omissions although every effort is made to ensure its accuracy. Be sure to let our advertisers know you found them through IEEE Circuits and Systems Magazine.]]></description>
			<pubDate><![CDATA[Fourthquarter  2011]]></pubDate>
			<guid><![CDATA[http://ieeexplore.ieee.org/xpls/abs_all.jsp?isnumber=6035846&arnumber=6083529]]></guid>
			<volume>11</volume>
			<issue>4</issue>
			<startPage>56</startPage>
			<endPage>56</endPage>
			<fileSize>47</fileSize>
			<authors><![CDATA[]]></authors>
		</item>
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