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TOC Alert for Publication# 63 2014October 30<![CDATA[Table of contents]]>303C1C4110<![CDATA[IEEE Transactions on Power Electronics publication information]]>303C2C2131<![CDATA[Enhanced Phase-Shifted PWM Carrier Disposition for Interleaved Voltage-Source Inverters]]>n interleaved parallel-connected legs, the best single-phase output voltage is achieved when the carriers are evenly phase shifted. However, switching among nonadjacent levels can be observed at regular intervals in the line-to-line voltages, causing bad harmonic performance. With the proposed method, switching in the line-to-line voltages happens exclusively between adjacent levels. The modulator utilizes two sets of n evenly phase-shifted carriers that are dynamically allocated. Because of its generality, the proposed implementation is valid for any number of phases and any number of legs in parallel. A MATLAB/Simulink model has been set up for simulation purposes. Selected experimental results obtained from a three-phase VSI made up with two and three legs in parallel per phase are reported, confirming the enhancement attained with the proposed implementation.]]>30311211125795<![CDATA[Deterioration Monitoring of DC-Link Capacitors in AC Machine Drives by Current Injection]]>30311261130474<![CDATA[EMI Generation Characteristics of SiC and Si Diodes: Influence of Reverse-Recovery Characteristics]]>30311311136507<![CDATA[Design and Operation of a Hybrid Modular Multilevel Converter]]>303113711461044<![CDATA[Capacitor Voltage Balancing of a Five-Level ANPC Converter Using Phase-Shifted PWM]]>303114711561186<![CDATA[Implementation of Kernel Incremental Metalearning Algorithm in Distribution Static Compensator]]>303115711693946<![CDATA[A Stepping On-Time Adjustment Method for Interleaved Multichannel PFC Converters]]>30311701176927<![CDATA[A Novel SPLL and Voltage Sag Detection Based on LES Filters and Improved Instantaneous Symmetrical Components Method]]>303117711881236<![CDATA[A Novel Control Method for Transformerless H-Bridge Cascaded STATCOM With Star Configuration]]>303118912021394<![CDATA[A Multilevel Energy Buffer and Voltage Modulator for Grid-Interfaced Microinverters]]>303120312191823<![CDATA[Wireless Power Transmission Through Concrete Using Circuits Resonating at Utility Frequency of 60 Hz]]>303122012291812<![CDATA[The Worst Conducted EMI Spectrum of Critical Conduction Mode Boost PFC Converter]]>303123012411668<![CDATA[Discontinuous Modulation Scheme for a Differential-Mode Ćuk Inverter]]>303124212541346<![CDATA[Objective-Oriented Power Quality Compensation of Multifunctional Grid-Tied Inverters and Its Application in Microgrids]]>303125512652522<![CDATA[A Novel Control Strategy of Suppressing DC Current Injection to the Grid for Single-Phase PV Inverter]]>303126612741201<![CDATA[Advanced Fabrication, Modeling, and Testing of a Microphotosynthetic Electrochemical Cell for Energy Harvesting Applications]]>$4.84, {rm cm}^{2}$ , which approximately translates to a power density of $400, {rm mW/m}^{2}$. This makes it as one of the best-performing μPSC. The other top-performing μPSC devices report power densities of between 100 and $250, {rm mW/m}^{2}$. The PSC produces energy under both dark and light conditions.]]>303127512851677<![CDATA[A Scheme for the Power Control in a DFIG Connected to a DC Bus via a Diode Rectifier]]>303128612961633<![CDATA[A Photovoltaic Array Transformer-Less Inverter With Film Capacitors and Silicon Carbide Transistors]]>303129713052096<![CDATA[A High Gain Input-Parallel Output-Series DC/DC Converter With Dual Coupled Inductors]]>303130613171115<![CDATA[Naturally Clamped Zero-Current Commutated Soft-Switching Current-Fed Push–Pull DC/DC Converter: Analysis, Design, and Experimental Results]]>303131813271350<![CDATA[High-Input-Voltage High-Frequency Class E Rectifiers for Resonant Inductive Links]]>$%$ has been achieved at a resonant frequency of 800 kHz.]]>30313281335925<![CDATA[Derivation, Analysis, and Comparison of Nonisolated Single-Switch High Step-up Converters With Low Voltage Stress]]>30313361344999<![CDATA[Analysis and Design of <italic>LLC</italic> Resonant Converters With Capacitor–Diode Clamp Current Limiting]]>LLC resonant converters with capacitor–diode clamp for current limiting in overload conditions. A new fundamental harmonic approximation-based equivalent circuit model is obtained through the application of describing function techniques, by examining the fundamental behavior of the capacitor–diode clamp. An iterative procedure to determine the conduction point of the diode clamp is also given. The behavior of this type of converter is analyzed and guidelines for designing the current limiting characteristics are discussed. The characterization of a 90 W converter design using the proposed methodology is presented. The converter voltage gain and the voltage–current characteristics under different overload conditions and operating frequencies are predicted using the proposed model, which accuracies are validated against the prototype with good correlation.]]>303134513551017<![CDATA[Low-Volume PFC Rectifier Based on Nonsymmetric Multilevel Boost Converter]]>$(85 {rm V_{rm rms}}hbox{-}265 {rm V_{rm rms}})$ PFC prototype demonstrate three times smaller inductor current ripple than that of the conventional boost converter allowing for the same inductor reduction. Efficiency improvements of up to a 6% are also demonstrated.]]>303135613721411<![CDATA[A High-Efficiency Resonant Switched Capacitor Converter With Continuous Conversion Ratio]]>303137313825102<![CDATA[Resonance Analysis and Soft-Switching Design of Isolated Boost Converter With Coupled Inductors for Vehicle Inverter Application]]>303138313922060<![CDATA[A Step-Up Bidirectional Series Resonant DC/DC Converter Using a Continuous Current Mode]]>303139314021673<![CDATA[Techniques of Dual-Path Error Amplifier and Capacitor Multiplier for On-Chip Compensation and Soft-Start Function]]>303140314101354<![CDATA[An Interface Circuit for Low-Voltage Low-Current Energy Harvesting Systems]]>$mu$ A at 0.5 V and exhibits an efficiency of 65% in the 1 $mu$W$-$1 mW range. The supply regulation unit is a two-stage, self-starting boost circuit that steps-up the 0.5-V input voltage to 3 V. To test the interface circuit, an autonomous wireless sensor node has been realized; it exploits the little electric power delivered by a 385 $mu$m $times$ 245 $mu$m photovoltaic harvester to sense and transmit information about the environment wirelessly. The harvester is implemented with a custom 0.35-$mu$m BCD SOI chip. The system has been designed to be low cost, fully autonomous and smaller of 9 cm$^{3}$.]]>303141114201313<![CDATA[High-Density Integration of High-Frequency High-Current Point-of-Load (POL) Modules With Planar Inductors]]>30314211431894<![CDATA[A High Temperature Silicon Carbide mosfet Power Module With Integrated Silicon-On-Insulator-Based Gate Drive]]>303143214451855<![CDATA[A Seamless Transition Control of Sensorless PMSM Compressor Drives for Improving Efficiency Based on a Dual-Mode Operation]]>303144614561433<![CDATA[An Extended-Speed Low-Ripple Torque Control of Switched Reluctance Motor Drives]]>303145714701761<![CDATA[Carrier-Based Implementation of SVPWM for Dual Two-Level VSI and Dual Matrix Converter With Zero Common-Mode Voltage]]>303147114872925<![CDATA[Z-Source Inverter-Based Approach to the Zero-Crossing Point Detection of Back EMF for Sensorless Brushless DC Motor]]>303148814981611<![CDATA[Elimination of Mutual Flux Effect on Rotor Position Estimation of Switched Reluctance Motor Drives]]>prior knowledge of mutual flux is proposed in this paper. Neglecting the magnetic saturation, the operation of conventional self-inductance estimation using phase current slope difference method can be classified into three modes: Mode I, II, and III. At positive-current-slope and negative-current-slope sampling point of one phase, the sign of current slope of the other phase changes in Mode I and II, but does not change in Mode III. Theoretically, based on characteristics of a 2.3 kW, 6000 rpm, three-phase 12/8 SRM, mutual flux introduces a maximum ±7% self-inductance estimation error in Mode I and II, while, in Mode III, mutual flux effect does not exist. Therefore, in order to ensure that self-inductance estimation is working in Mode III exclusively, two methods are proposed: variable-hysteresis-band current control for the incoming phase and variable-sampling self-inductance estimation for the outgoing phase. Compared with the conventional method which neglects mutual flux effect, the proposed position estimation method demonstrates an improvement in position estimation accuracy by 2°. The simulations and experiments with the studied motor validate the effectiveness of the proposed method.]]>303149915121564<![CDATA[A Fast Method for Generating Time-Varying Magnetic Field Patterns of Mid-Range Wireless Power Transfer Systems]]>303151315201304<![CDATA[Time-Shift Current Balance Technique in Four-Phase Voltage Regulator Module with 90% Efficiency for Cloud Computing]]>303152115341440<![CDATA[<italic>In Situ</italic> Diagnostics and Prognostics of Solder Fatigue in IGBT Modules for Electric Vehicle Drives]]>in situ diagnostic and prognostic (D&P) technology to monitor the health condition of insulated gate bipolar transistors (IGBTs) used in EVs with a focus on the IGBTs’ solder layer fatigue. IGBTs’ thermal impedance and the junction temperature can be used as health indicators for through-life condition monitoring (CM) where the terminal characteristics are measured and the devices’ internal temperature-sensitive parameters are employed as temperature sensors to estimate the junction temperature. An auxiliary power supply unit, which can be converted from the battery's 12-V dc supply, provides power to the in situ test circuits and CM data can be stored in the on-board data-logger for further offline analysis. The proposed method is experimentally validated on the developed test circuitry and also compared with finite-element thermoelectrical simulation. The test results from thermal cycling are also compared with acoustic microscope and thermal images. The developed circuitry is proved to be effective to detect solder fatigue while each IGBT in the converter can be examined sequentially during red-light stopping or services. The D&P circuitry can utilize existing on-board hardware and be embedded in the IGBT's gate drive unit.]]>303153515431078<![CDATA[Universal Integrated Synchronization and Control for Single-Phase DC/AC Converters]]>303154415571175<![CDATA[Predictive Control Method With Future Zero-Sequence Voltage to Reduce Switching Losses in Three-Phase Voltage Source Inverters]]>303155815661227<![CDATA[An Enhanced Model for Small-Signal Analysis of the Phase-Shifted Full-Bridge Converter]]>303156715761787<![CDATA[Improved Transient Response of Controllers by Synchronizing the Modulator With the Load Step: Application to <inline-formula><tex-math>$V^2I_{rm c}$</tex-math></inline-formula>]]>$V^2I_{rm c}$ is a ripple-based control with an excellent performance for load transients and reference voltage tracking because it exhibits a feedforward of the load current and the error of the output voltage. However, if $V^2I_{rm c}$ is modulated with constant frequency, constant on-time or constant off-time, its dynamic response is hindered by delays in the response. This paper proposes a technique that synchronizes the clock of the converter to initialize the duty cycle when a worst-case load transient occurs using the current through the output capacitor to detect load transients. It is exemplified on a $V^2I_{rm c}$ control but it is applicable to most of controllers as it only acts on the modulator.]]>303157715901930<![CDATA[Power Controllability of a Three-Phase Converter With an Unbalanced AC Source]]>303159116041634<![CDATA[Accurate Reactive Power Sharing in an Islanded Microgrid Using Adaptive Virtual Impedances]]>303160516171907<![CDATA[<italic>dq</italic>-Frame Cascaded Delayed Signal Cancellation- Based PLL: Analysis, Design, and Comparison With Moving Average Filter-Based PLL]]>dqCDSC-PLL (PLL with in-loop dq-frame CDSC operator). The study is started with an overview of this PLL. A systematic design method to fine tune its control parameters is then proposed. The performance of the dqCDSC-PLL under different grid scenarios is then evaluated in detail. It is then shown that how using the proportional-integral-derivative controller as the loop filter can improve the response time of dqCDSC-PLL. A detailed comparison between the dqCDSC-PLL and moving average filter (MAF) based PLL (MAF-PLL) is then carried out. Through a detailed mathematical analysis, it is also shown that these PLLs are equivalent under certain conditions. The suggested guidelines in this paper make designing the dqCDSC-PLL a simple and straightforward procedure. Besides, the analysis performed in this paper provides a useful insight for designers about the advantages/disadvantages of dqCDSC-PLL for their specific applications.]]>303161816321551<![CDATA[Performance of Multistep Finite Control Set Model Predictive Control for Power Electronics]]>303163316442132<![CDATA[Analytical Formulas for Phase Voltage RMS Squared and THD in PWM Multiphase Systems]]>30316451656754<![CDATA[A Systematic Approach for Load Monitoring and Power Control in Wireless Power Transfer Systems Without Any Direct Output Measurement]]>303165716671130<![CDATA[Automatic Mode-Shifting Control Strategy With Input Voltage Feed-Forward for Full-Bridge-Boost DC–DC Converter Suitable for Wide Input Voltage Range]]>3031668168213252<![CDATA[A Simple Average Current Control With On-Time Doubler for Multiphase CCM PFC Converter]]>$110hbox{-}V_{rm rms}$ and $220hbox{-}V_{rm rms}$ line voltages. The line current harmonics also meet the IEC61000-3-2 Class D standard.]]>303168316931271<![CDATA[A High Step-Up DC to DC Converter Under Alternating Phase Shift Control for Fuel Cell Power System]]>303169417031292<![CDATA[Asymmetrical Fault Ride Through as Ancillary Service by Constant Power Loads in Grid-Connected Wind Farm]]>30317041713560<![CDATA[Hybrid Control of DC–DC Series Resonant Converters: The Direct Piecewise Affine Approach]]>303171417232304<![CDATA[Small-Signal Analysis and Optimal Design of Constant Frequency <inline-formula><tex-math>$V^{2}$ </tex-math></inline-formula> Control]]>$V^{2}$ control and its variety named ripple-based control has been gaining more and more popularity in academia research and commercial products. However, for constant frequency $V^{2}$ control, design methodology is not clear due to insufficient knowledge about the small-signal model. This paper investigates the small-signal model and optimal design strategy for constant frequency $V^{2}$ control. The factorized small-signal control-to-output voltage transfer function and output impedance are investigated. The stability criterion is obtained and design considerations are analyzed. Moreover, the small-signal model with ramp compensations is presented and optimal design guidelines from dynamic performance point of view are provided. For the first time, it is found the external ramp is good enough to get a well-damped performance when current feedback strength is strong (for example, when employing OSCON capacitors). However, the current ramp is necessary to achieve a good dynamic performance when the current feedback strength is weak (for example, when employing ceramic capacitors). As a result, a new control strategy with the hybrid ramp is proposed for ceramic capacitor applications. The small-signal model and proposed design guidelines are verified with Simplis simulation and experimental results.]]>303172417338146<![CDATA[A Single-Stage Solid-State Transformer for PWM AC Drive With Source-Based Commutation of Leakage Energy]]>303173417461837<![CDATA[A Technique to Estimate the Equivalent Loss Resistance of Grid-Tied Converters for Current Control Analysis and Design]]>3031747176118452<![CDATA[Rotating Switching Surface Control of Series-Resonant Converter Based on a Piecewise Affine Model]]>303176217721647<![CDATA[IEEE Power Electronics Society Information]]>303C3C3122