<![CDATA[ Power Electronics, IET - new TOC ]]>
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TOC Alert for Publication# 4475725 2015May 04<![CDATA[Zero-steady-state-error compensation method in application of peak current mode buck converter with fast transient response]]>85647655818<![CDATA[Low computational burden grid voltage estimation for grid connected voltage source converter-based power applications]]>85656664931<![CDATA[Control and dynamic analysis of a parallel-connected single active bridge DC–DC converter for DC-grid wind farm application]]>85665671680<![CDATA[Low-leakage 4H-SiC junction barrier Schottky rectifier with sandwich P-type well]]>+ grids are replaced by low-doped P (LDP) region based on the common JBS rectifier. The forward and reverse characteristics of SPW JBS rectifier have been compared with those of common JBS rectifier at different temperatures. The reverse current density of SPW JBS rectifier is about 2.4 × 10^{-5} times of common JBS rectifier at -800 V bias voltage. The upper LDP of SPW JBS is helpful to give a reduction in forward voltage drop. The spreading current and tunnelling current of SPW JBS rectifier are lower, because the depletion layer width in lower LDP is larger than that in P^{+} grid region at the same reverse voltage. As a result, the breakdown voltage of SPW JBS rectifier increases by 83.5% compared with that of common JBS rectifier. The on/off (1 V/ -500 V) current ratios of SPW JBS and common JBS rectifiers are 3.8 × 10^{7} and 1.2 × 10^{3}, respectively. In addition, the figure of merit of SPW JBS rectifier is 347, which is two times larger than that of common JBS rectifier.]]>85672677535<![CDATA[Advanced hexagonal layout design for split-gate reduced surface field stepped oxide U-groove metal–oxide–semiconductor field-effect transistor]]>R_{SP} as compared with the common hexagonal and mesa strip layout structures. The figure of merit of the AHP layout improves by 49.8% as compared with the other two types of layouts, and the AHP has superior characteristics within a wider N_{D} range.]]>85678684890<![CDATA[Estimation of transient surge energy transferred with associated time delays for individual components of surge protector circuits]]>85685692745<![CDATA[Universal acoustic modelling framework for electrical drives]]>85693699827<![CDATA[Single-phase current source converter with power decoupling capability using a series-connected active buffer]]>85700707984<![CDATA[Discrete-time sliding-mode-based digital pulse width modulation control of a boost converter]]>85708714556<![CDATA[Sigma-Z-source inverters]]>857157231073<![CDATA[Exact steady-state analysis in multiple-input converters applied with diverse time-sharing switching schemes]]>85724734767<![CDATA[Resonant harmonic elimination pulse width modulation-based high-frequency resonance suppression of high-speed railways]]>85735742835<![CDATA[Design of high-efficiency non-insulated step-up converters]]>85743749562<![CDATA[Class of high boost inverters based on switched-inductor structure]]>857507591245<![CDATA[Particle swarm optimisation in efficiency improvement of vector controlled surface mounted permanent magnet synchronous motor drive]]>d-axis) stator current, according to the desired speed of operation and load torque. The optimal value of d-axis current has been obtained through analytical method as well as through PSO. The motor efficiency is maximised by using the optimal d-axis current to minimise the air gap flux, resulting in reduction of the core losses, especially at light load conditions. The robustness of the efficiency optimisation algorithms are demonstrated through parametric sensitivity analysis. Implementations of efficiency optimisation algorithms are carried out in Matlab and the performance of PMSM drive is described under steady state as well as transient operating conditions. The effect of efficiency optimisation algorithms in different region of operation of PMSM such as constant speed-variable load torque and constant torque-variable speed modes are described.]]>85760769987<![CDATA[Analysis, control and experimental verification of a single-phase capacitive-coupling grid-connected inverter]]>P-unit current controller is proposed for use with the CGCI, as a proportional-integral controller is not suitable. Finally, simulation and experiments show the effectiveness of the proposed approach.]]>857707821977<![CDATA[Multi-resolution analysis for converter switch faults identification]]>857837921516<![CDATA[Family of quadratic step-up dc–dc converters based on non-cascading structures]]>R^{2}P^{2}). This principle states that the power transfer from input port and output port on interconnected converters is reduced when a non-cascading connection is used. As shown in this study, the principle R^{2}P^{2} is useful for developing new converters. These have wide conversion ratios and quadratic dependence with respect to the duty ratio. In this study, the voltage conversion ratios, average models and steady-state operating conditions for proposed converters are derived, which are verified by experimental results.]]>85793801836<![CDATA[Small-signal model analysis and control design of a double-ended forward converter in discontinuous-capacitor-voltage mode]]>858028131907<![CDATA[DC/DC converter with parallel input and parallel output with shared power switches and rectifier diodes]]>858148211292<![CDATA[Bridgeless converter with input resistance control for low-power energy harvesting applications]]>85822830889<![CDATA[Double tapped-inductor boost converter]]>85831840863<![CDATA[Battery ripple effects in cascaded and parallel connected converters]]>85841849947<![CDATA[Erratum: Theoretical modelling of the storage energy envelope of high frequency AC reactive components to predict chaos boundary]]>85850850168