http://ieeexplore.ieee.org TOC Alert for Publication# 4156126 2013 May 21 7 2 C1 C1 214 7 2 C2 C2 146 7 2 105 106 467 $mu{rm m}$ CMOS technology and the area of the core circuit is 0.076 ${rm mm}^{2}$. The measured high-pass cutoff frequency is as low as 0.3 Hz and the low-pass cutoff frequency is adjustable from 1 kHz to 10 kHz. The measured maximum current gain is 55.9 dB. The measured input-referred current noise density is 153 ${,rm fA}/sqrt{rm Hz}$ , and the power consumption is 13 $mu{rm W}$ at 1-V power supply. The fabricated CMFEA has been successfully applied to the animal test for recording the seizure ECoG of Long-Evan rats.]]> 7 2 107 114 1748 ${-}77.7$ dBm sensitivity with $10^{-8}$ BER at 48 Mbps data rate. ESD testing on all the electronic inputs and outputs has proven that the implantable device satisfies the HBM Class-1B ESD Standard. In addition, the evaluation of the worst-case charge density delivered to the tissue from each I/O pin verifies the patient safety of the device in the event of failure. Finally, the functionality and reliability of the complete device has been tested on-bench and further validated chronically in ongoing freely moving swine and monkey animal trials for more than one year to date.]]> 7 2 115 128 3371 $mu$m HV CMOS technology and occupies a core die area of approximately 2.8 mm$^2$ for an 8 channel implementation.]]> 7 2 129 139 2327 7 2 140 148 1205 $mu$m CMOS technology, the proposed ADC uses a chip area of 220$,times,$ 203 $mu$ m$^{2}$ . Operating from a supply voltage of 0.8 V, the ADC consumes 313–582 nW from 5 Hz to 5 kHz and achieves an ENOB up to 7.9 bits.]]> 7 2 149 157 1416 7 2 158 168 2257 7 2 169 177 3271 7 2 178 185 1839 $mu$ ${rm V}_{rm RMS}$ and a signal-to-noise ratio of 112 dB. The communication link is implemented using a dual-band radio frequency transceiver offering a half-duplex 800 kb/s data rate, 16.5 mW power consumption and less than $10^{-10}$ post-correction Bit-Error Rate (BER). The designed system can be accessed and controlled by a computer with a user-friendly graphical interface. The proposed wireless implantable recording device was tested in vitro using real icEEG signals from two patients with refractory epilepsy. The wirelessly recorded signals were compared to the original signals recorded using wired-connection, and measured normalized root-mean square deviation was under 2%.]]> 7 2 186 195 1968 $mu{rm A}$ stimulus currents, as the loading impedance varied within 10 ${rm k}Omega$ –300 ${rm k}Omega$. The performances of this design have been successfully verified in silicon chip fabricated by a 0.35- $mu{rm m}$ 3.3-V/24-V CMOS process. The power consumption of this work was only 1.1 mW–1.4 mW. The animal test results with the fabricated chip of proposed design have successfully verified in the Long-Evans rats with epileptic seizures.]]> 7 2 196 203 1582 7 2 204 211 1356 7 2 212 212 112 7 2 C3 C3 90 7 2 C4 C4 5