<![CDATA[ Circuits, Devices and Systems, IEE Proceedings - - new TOC ]]>
http://ieeexplore.ieee.org
TOC Alert for Publication# 2190 2007November 26<![CDATA[Cascaded noise figure calculations for radio receiver circuits with noise-aliasing properties]]>1536517524456<![CDATA[Equivalent circuit model of a stacked inductor for high-Q on-chip RF applications]]>S formulas are implemented accurately to predict the series resistance of the stacked inductor. The verification has been carried out using a mature 0.18 mum process to fabricate stacked inductor with various sizes and types. All the measured data are extracted from a silicon device based on a physical layered test system (PLTS). The predicted and measured S-parameter results show excellent correlation in terms of performance for frequencies up to 15 GHz. A high-Q on-chip active inductor is demonstrated using a multiple turns stacked inductor]]>15365255321226<![CDATA[Efficient and flexible architecture for AES]]>1536533538129<![CDATA[CORDIC-based unified VLSI architecture for implementing window functions for real time spectral analysis]]>2 (approximately)]]>1536539544475<![CDATA[Packing-based VLSI module placement using genetic algorithm with sequence-pair representation]]>1536545551178<![CDATA[Fully differential current-mode third-order Butterworth VHF G/sub m/-C filter in 0.18 /spl mu/lm CMOS]]>m-C filter using current-mode linear transformation (CMLT) techniques. The systematic design method and procedure are developed to realise CMLT G_{m}-C filters efficiently. A third-order Butterworth lowpass filter with 200 MHz cutoff frequency, embedded bandgap reference and bias circuit is implemented in a TSMC 0.18 mum 1P6M process. The total harmonic distortion of the proposed current-mode filter is -46.5 dB at 200 MHz with input signal 0.4 mA. Power dissipation is 16.77 mW under 1.8 V supply voltage. Its core area occupies 0.163times0.186 mm^{2 }. Both post-layout simulation and experimental results confirm the theoretical analysis. The proposed circuits can be extended to high-order Chebychev and elliptic filters]]>15365525581727<![CDATA[Statistical modelling and design guidelines of CMOS current references]]>1536559564151<![CDATA[Noise-tolerance improvement in dynamic CMOS logic circuits]]>1536565573913<![CDATA[High-speed self-timed carry-skip adder]]>1536574582301<![CDATA[Approximation of arbitrary complex filter responses and their realisation in log domain]]>1536583590702<![CDATA[Hybrid multi-polarity arithmetic¿Walsh transform]]>1536591598213