Researching on quadrature conversion structures for an UWB demonstrative receiver

Some structures of digital quadrature AD conversion for software-defined radio (SDR) systems are studied. Their performances and affections on the SDR systems are also analyzed. Two generalized quadrature AD schemes are proposed. In one of them, the AD sampling speed can be reduced by 2 times; and in the other both the output data rate of every channel and AD sampling speed can be lowered by paralleling the digital quadrature filtering structure. These structures can be also easily implemented into modules, and the polyphase filters can be flexibly realized by VHDL language based one chip of FPGA. To assess the proposed schemes, their applications to a particular ultra wideband (UWB) demonstrative receiver system are introduced. Some experimental results are also given. It is shown that the generalized quadrature AD structures are reliable and feasible for its module design, and performances are improved obviously for its better performance to price ratio.