Stress Liner Effects for 32-nm SOI MOSFETs With HKMG

Strain effects from stress liners on silicon-on-insulator MOSFETs with high-k dielectric and metal gate (HKMG) are reported. By thoroughly evaluating their impact on drive current, mobility, and threshold voltage, the intrinsic performance gain of stress liners is quantified at the 32-nm node with mobility enhancement identified as the major source. It is also experimentally demonstrated that advantageous stress liners can reduce gate leakage currents for MOSFETs with HKMG.