Indium thermal interface material development for microprocessors

Optimal thermal design of high-power electronic components often requires use of solder-type thermal interface materials. Pure indium solder provides best combination of mechanical and thermo-mechanical properties for efficient thermal design. Two indium TIM assembly approaches were investigated: pre-attach approach and preform approach. Pre-attach refers to bonding indium to the lid cavity first, prior to microprocessor lid attach. Preform refers to direct bonding of indium to lid and silicon in a single reflow process. In the pre-attach approach, indium preform is attached to nickel-plated lid without gold metallization with aggressive flux. This type of flux must be cleaned thoroughly prior to microprocessor lid attach to avoid corrosion. After reflow, indium takes the shape of a dome in the lid cavity. This dome-shape indium can cause lid tilt reject during lid attach. Therefore, a follow-up coining step is required to flatten the indium dome prior to lid attach. At the early stage of development, a solder-dipping test was conducted to understand the basic wetting characteristic of pure indium on metalized silicon and lid, both with and without flux. Flux selection is one important step in indium process development. A good flux is one that can be deposed with conventional jet spray equipment, resulting in minimal void formation during reflow, leaving no harmful residue that will corrode microprocessors, and meeting halogen-free requirements. Many experiments were carried out to assess the manufacturability and reliability of both approaches. Pros and cons of both approaches were studied in detail and, finally, indium preform approach was selected for further extensive process development. Many reliability tests such as power cycle, highly accelerated stress test (HAST), temperature-humidity test, high-temperature storage test (HTS), shock test, and vibration test were conducted to ensure this solder-TIM will have no negative impact on microprocessor reliability.