Novel SOI CMOS design using ultra thin near intrinsic substrate

A novel SOI CMOS design has been explored. It utilizes an ultra thin near intrinsic substrate wherein no channel doping is introduced during processing. The enhancement operation is realized solely by proper adjustment of work function difference through p+ poly gate for n-channel devices and n+ poly gate for p-channel devices. The absence of depletion charge in this structure is conducive to improved drive current and threshold control. The structure has been realized by implanted buried oxide SOI technology.