A 400MHz 160-word × 64-bit 14-port floating-point register file macrocell for a superscalar RISC processor

A 400MHz 160-word × 64-bit 14-port floating-point register file for a superscalar RISC processor is presented. A large number of registers makes it possible to hide the long access latency of the main memory, and improves the performance of a processor by over double. A line boost circuit and a precharge circuit are successfully applied to the register file to realize 1.4ns read access. The register file makes use of 0.25µm CMOS technology with a 1.8V power supply. It has 856K transistors and dissipates 2.5W at 400MHz.