A 0.6V 205MHz 19.5ns tRC 16Mb embedded DRAM

A 0.6V 16Mb embedded DRAM macro is presented as a solution for mobile personal consumer applications. The macro has 128 separate I/Os and employs positive and negative on-chip body bias, boosted and staggered power gating, and Vcc/2 sensing to achieve 205MHz operation with 19.5ns tRC and 39mW operating power.