Improved methodology based on hot carriers injections to detect wafer charging damage in advanced CMOS technologies

We have studied the possibility to use hot carrier stresses to reveal the damage due wafer charging during plasma process steps in 0.18 /spl mu/m, 0.25 /spl mu/m and 0.6 /spl mu/m CMOS technologies. We have investigated various hot carrier conditions in N- and P-MOSFETs and compared the results to classical parameter studies and short high field injections using a relative sensitivity factor. The most accurate monitor remains the threshold voltage and the most sensitive configuration is found to be short hot electron injections in PMOSFET's.