Multirate deadbeat control for PWM inverters using FPGA based hardware controller

A new approach for real time digital feedback control of PWM inverter is proposed, in which a deadbeat control combined with the multirate sampling method is realized using FGPA (field programmable gate array) based hardware controller. Deadbeat control ensures the state variables matches at each sampling instants for every sampling period. Also it is reported that the multirate sampling method improve the controllability when the nominal system is sensitive to the parameter variations. The capacity of the output LC filter component occupies ineligible area for the cost performance of the inverter system for the UPS applications. If the capacity of the output LC filter is too small, the output voltage waveforms tends to oscillate between the sampling period when the deadbeat control is applied to the inverter system. In this paper, a novel approach to solve such phenomenon is proposed, which is the deadbeat control method combined with the multirate sampling method as capacitor current compensation, using FPGA based hardware controller. Adopting the multirate sampling method, the sampling frequency of the inverter becomes half of the carrier frequency, and it is suitable to implement for higher carrier frequency. Also the FPGA based control hardware enables to realize almost ideal real time feedback controller because of its capability to realize very fast calculation of the control method within a few /spl mu/s. Design concept and hardware implementation of the FPGA based hardware controller for the inverter is presented. From the view point of UPS applications, the advantages and the disadvantages are discussed though simulations and experiments, the superiority of the proposed control law is verified.