Parallel CLA algorithm for fast addition

The carry look-ahead (CLA) is a popular addition algorithm in the Arithmetic and Logic Unit (ALU) of computers. The algorithm is based on the computation of the carries using one CLA circuit. In the paper, a parallel version of the CLA circuit is presented. Two, three or four parallel CLA circuits may be employed in the computation of the carries. The computations of the carries are equally divided among the parallel CLA circuits. Despite the inclusion of non-binary logic the presented parallel algorithm is completely realizable by binary gates. The different versions of the parallel CLA algorithm and the conventional CLA algorithm are compared in terms of gate delays.