A fully balanced programmable sample-hold amplifier for low-voltage applications

In this paper, we propose a CMOS fully balanced sample-hold amplifier. The proposed circuit is based on the technique described by Goncalves et al. (1996), which is appropriate for low voltage operation. The programmability of the sample-hold circuit is achieved via the MOSFET Only Current Divider (MOCD). We present a new method for sign-bit realization using the two output currents of the MOCD. The programmable S/H circuit is designed to be fabricated in a 0.8 /spl mu/m CMOS technology with /spl plusmn/0.75 V power supply.