Fabrication of a three-axis accelerometer integrated with commercial 0.8 /spl mu/m-CMOS circuits

In the present study, a fabrication technology of bulk-micromachined three-axis accelerometer integrated with commercial CMOS circuits has been investigated for low cost realization and improvement of device performance. The key technologies in the developed fabrication technology are wafer thickness control, backside polishing with chemical spin etching and anisotropic etching with PVD SiO/sub 2/ mask. The signal processing circuits were fabricated with a commercial 0.8 /spl mu/m-CMOS technology, and all the micromachining processes were performed to complete CMOS wafers. Characteristics of the devices and reliability for the repetitive vibration load were evaluated. As a result, basic performance of the accelerometers with this technology was confirmed.