Integration of low k methyl silsesquioxane in a non-etchback/CMP process for 0.25 /spl mu/m LSI device

A nonetchback intermetal dielectric (IMD) process using cage-type methyl silsesquioxane (MSQ) is demonstrated for 0.25 /spl mu/m LSI devices. The peeling problem of plasma enhanced TEOS (P-TEOS) SiO/sub 2/ on the MSQ during the chemical mechanical polishing (CMP) process is solved by using NH/sub 3/-N/sub 2/ plasma treatment. This adhesion improvement is due to the decrease in Si-CH/sub 3/ bonds and formation of Si-NH on the MSQ surface. Parasitic capacitance for MSQ is 28% lower than that for HDP-SiO/sub 2/. The via poisoning problem is greatly suppressed by NH/sub 3/-N/sub 2/ plasma treatment at the via.