Ultra fine line print process development for silicon solar cell metalisation

One of the principal drivers for the continuing miniaturisation of frontside conductors on silicon solar cells is the trend toward higher emitter sheet resistances. This trend is apparent both in mainstream cell production, and with the introduction of selective emitter technologies. High R
_sheet
emitters make more efficient use of the blue end of the light spectrum, thereby enhancing cell efficiency. However, this benefit comes with the downside that the higher R
_sheet
emitter impedes the flow of electrons through the semi conducting silicon, and therefore reduces current collection. Using a greater number of finer conductors with reduced conductor spacing can mitigate these resistance losses with no additional shadowing loss, thereby acting as an enabler for high Rsheet emitter technologies. With today's mainstream cell manufacturers printing lines below 100μm wide, the sub 50μm printed line becomes the next logical milestone in the miniaturisation of frontside conductor geometries. This paper will describe the path to that milestone and beyond.