A CMOS 120 mW 8-bit Voltage Output Video DAC using a Current-Cell Matrix

This paper describes an 8-bit CMOS video speed D/A converter fabricated in a 2.4 μm CMOS technology. In order to achieve monotonicity and static linearity, a current cell-matrix configuration has been used. The linearity errors due to the voltage drop along the reference lines has been reduced by the choice of a small full-scale current (2 mA). A very simple cell structure has been adopted to reduce the matrix area. In order to perform a high speed operation, a high speed decoding circuit with one stage latches has been developed. The design of a transimpedance amplifier at the output of the matrix allows a fast settling time with a low impedance output. The experimental results show that the maximum convertion rate is 33 Mhz, the dc integral and differential linearity errors are 0.25 LSB and the typical power consumption is 120 mW. Recent developments in digital TV, and high picture quality requirements will lead to a more general use of an efficient and low cost video digital to analog converter. New video decoder architectures [1] and the introduction of the MAC standard [2] for direct satellite broadcasting have created a need for triple 8-bit D/A converters in the range of 27 Mhz for the sampling rate. Efficient architectures using CMOS technology have been proposed [3,4] which guarantee monotonicity and small area requirements.