Low-Power Low-Voltage Digital System for Wireless Heart Rate Monitoring Application

Low-power low-voltage digital system for wireless heart rate monitoring application is presented in this paper. This paper includes the system design and focuses more on the heart rate computing algorithm, digital baseband and the system design from FPGA prototyping to custom IC. The heart rate sensor system consists of an amplifier, an ADC (analog-to-digital converter), and a digital system. The digital system consists of a power/clock management block, a heart rate computing block and a digital baseband block. This system is implemented using discrete components and also in an integrated IC using 0.18-mum CMOS technology.