A high performance class-D power amplifier using error feedback architecture

An architecture that enhances the performance of a class-D amplifier is proposed. The structure consists of a sigma-delta modulator (SDM) which converts the input signal to a 1-bit pulse duration modulation signal. The H-bridge driven by this signal is made part of the SDM loop. The feedback is achieved by two different approaches. One consists of a 4-bit SD analog-to-digital converter and the other consists of a SDM in the continuous time (CT) domain. These arrangements enable the shaping of the high frequency in-band noise generated at the output power stage