CMOS adaptive biasing circuits for low-power applications

In this paper, a CMOS adaptive biasing topology for low-power applications is presented. The circuit gives an output current which is dependent on the applied input differential voltage. The proposed topology can be utilised in low-voltage low-power operational amplifiers (in particular in their input stages), where a dynamic biasing current helps to save power dissipation. A Spice simulation demonstrating the effectiveness of the proposed solution in a standard 0.7/spl mu/ CMOS technology is also reported.