Lateral npn bipolar transistor for high current gain applications at reduced temperatures

The possibility of operating a high-current-gain lateral bipolar junction transistor (BJT), derived from a CMOS structure by jointing the gate and the substrate to form the base of the BJT, at very low temperature is described. This transistor does not suffer any current gain degradation at 77 K due to heavy doping effects. The structure can also be used in a BiCMOS technology on SOI. The principles of operation are described, and the device parasitics are discussed. Experimental results for a device obtained from a 0.5- mu m MOSFET and for an equivalent device built on a 0.3- mu m SOI with ZMR epitaxial layer are presented and discussed.<
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