A 1.2-ns HEMT 64-kb SRAM

A 1.2-ns emitter-coupled-logic (ECL)-compatible 64-kb static RAM using 0.60- mu m gate high-electron-mobility-transistor (HEMT) technology was developed. To achieve fast access time, the memory cell array was divided into sixteen 4-kb memory planes and a data-line equalization technique was adopted. The chip power consumption was suppressed to 5.9 W by using three power supply voltages (-1.0, -2.0, and -3.6 V) and a normally off (E/D) source-follower buffer for the word driver circuit. A new device fabrication technique, the HEMT double-etch-stop process, enabled the RAM to be fabricated in simple and fewer processing steps and reduced the chip dimensions to 7.4*6.5 mm.<
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