A packet switch with bufferless switch cards and partial distribution of VOQ-state information to parallel arbiters

The main problem of bufferless crosspoint switches is the realization of fast arbitration between the input and output ports. Keeping the arbitration simple and fast, a higher throughput can be achieved by using a number of switches in parallel. With increasing port speed the bandwidth needed to report input queue state information to the parallel arbiters poses a second problem. To avoid costly high-speed communication lines or large number of pins on the arbiter, this paper defines three different methods to reduce this bandwidth by informing the arbiters only partially of the states of the input queues. Simulations of these state distribution methods show a similar and under some conditions even better performance than for a reference method in which all arbiters are completely informed.