Small-Signal Modeling of Phase-Shifted Digital PWM in Interleaved and Multilevel Converters

In this article, small-signal modeling of digital pulsewidth modulators (DPWMs) used in multicell voltage source converters (VSCs) is addressed. In addition to sampling and computation, DPWM introduces delay, which impairs VSC's dynamic performance and robustness. In order to take into account the influence of modulation delay, an accurate small-signal representation of DPWM is necessary. Here, modeling of multisampled bipolar and unipolar phase-shifted DPWMs for single-, double-, and multi-update strategies is presented. The simplest multilevel modulation of single-cell full-bridge VSCs, unipolar DPWM, is also covered by the analysis. The derived operating-point-dependent small-signal DPWM models are verified using simulated and experimental frequency response measurements up to four times the Nyquist frequency. Comparisons are also made with the models conventionally considered in the literature. Additionally, an approximate method is presented to model the influence of dead time on DPWM's small-signal dynamics. For the purposes of showcasing the importance of the proposed DPWM models, high-frequency admittance of a VSC employing multisampled multiupdate unipolar DPWM is modeled and verified in simulations and experiments.