A single D-FET 4-QAM with SC technology

A four-quadrant analog multiplier is described that realizes the multiplication of two signals using the triode-region characteristics of a depletion field-effect transistor (D-FET). The design uses only a single D-FET and associated switched-capacitor circuits. As a result, not only has a simple structure been obtained but also the requirement for matching of the D-FETs (which is inherently imposed on this type of multiplier using multiple D-FETs) is completely removed. By adjusting the width of the clock pulse, it is possible to eliminate the error introduced by mismatching between the capacitances inside the multiplier. A four-quadrant analog multiplier (4-QAM) constructed to verify the operating qualities described is reported to have good characteristics.<
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