No-flow underfill process optimization for high yield and reliability in flip chip assembly

No-Flow underfill process has been widely accepted as a key technology to implement low-cost, high-throughput flip chip on board (FCOB) assembly because of the elimination of processing steps such as flux application, flux residue cleaning, capillary underfill flow and secondary thermal curing of the underfill. While feasibility tests for the low-cost, high-throughput flip chip assembly based on no-flow underfill over a wide range of flip chip configurations are underway, unfamiliar process defects that have not been observed in the conventional capillary flow process are newly found. Of those new process defects, "chip floating" over the board surface after chip placement process is a critical issue that may significantly impact process yield when process variables are not properly controlled. It was found that much of the yield losses observed post reflow is attributed to the "chip floating". In order to understand the underlying physics of the floating phenomena and predict process variables to eliminate the process defects, a process model has been developed. The model can be used to optimize the no-flow underfill process. In addition, the effect of the underfill volume on the reliability is discussed associated with the underfill fillet shape.