Quality factor improvement of on-chip inductors for HIPERLAN RFIC by micromachining

The enhancement of quality factor of on-chip inductors by micromachining for HIPERLAN application is presented. A process for the selective removal of the substrate underneath the on-chip inductors is also developed. The fabrication steps consist of anisotropic wet etching of the semiconductor substrate under the inductors followed by laser stripping of passivation layers to expose the pads for IC testing. Experimental results show that the quality factors of the micromachined inductors can be increased by up to 50% around 5 GHz, which is suitable for HIPERLAN applications.