Sub-0.1 /spl mu/m MOSFET fabrication using 248 nm lithography by resist trimming technique in high density plasmas

A resist trimming technique using oxygen containing gas mixture in high-density plasma is presented that allows the fabrication of sub-0.1 /spl mu/m MOSFET with 248 nm lithography. The trimming step is done in-situ as part of the gate etch processes. The effect of the important etcher parameters such as RF source power, bias voltage, O/sub 2/ gas flow, reactor pressure and over-etch percentage on the process characteristics such as trim rate, uniformity and microloading has been investigated by means of statistically designed experiments. These trends have been applied to the process optimization for a single layer photoresist, binary masks and conventional 248 nm illumination to fabricate 0.08 /spl mu/m gate electrodes. Anisotropic profiles of polysilicon lines can be obtained with the trimmed resist as a mask. The effect of the trimming step on critical dimension control is quantified, and the electrical performance of the transistors is presented. The resist trimming process was found to be controllable and reproducible.