A 2.5-V 12-b 54-Msample/s 0.25-/spl mu/m CMOS ADC in 1-mm/sup 2/ with mixed-signal chopping and calibration

This paper describes a two-step analog-to-digital converter (ADC) with a mixed-signal chopping and calibration algorithm. The ADC consists primarily of analog blocks, which do not suffer from the matching limitations of active devices. The offset on two residue amplifiers limits the accuracy of the ADC. Background digital offset extraction and analog compensation is implemented to continuously remove the offset of these critical analog components. The calibrated two-step ADC achieves -70 dB THD in the Nyquist band, with a 2.5-V supply. The ADC is realized in standard single-poly 5-metal 0.25-/spl mu/m CMOS, measures 1.0 mm/sup 2/, and dissipates 295 mW.