An N-Way Single-Inductor High-Pass Power Divider for 5G Applications

This letter reports on the analysis and the design of a novel N-way single-inductor power divider (PD), which allows for a compact size regardless of the number of ports. Moreover, the reported topology simplifies the interconnection of the isolation resistors, making the design of PDs with more than four ports straightforward and systematic. Finally, a 4-way silicon prototype has been fabricated employing the IHP SG13S BiCMOS technology to validate the concept. The chip is meant for mmWave frequencies and is devoted to 5G applications. It occupies an area of 0.005 mm
²
and provides a minimum loss of 1 dB, as well as phase and amplitude errors lower than 0.4 dB and 2°, respectively, in the band of interest. To the best of our knowledge, this design results in the smallest silicon area occupation, halving the size with respect to the state-of-the-art PDs. Comparable physical dimensions to the presented 4-way PD can only be achieved with 2-way designs.