A FPGA implementation of a DCT-based digital electrocardiographic signal compression device

The use of portable Electrocardiographic (ECG) recording devices is directly dependent on the amount of physical memory available. Common recording techniques using enough bit encoding at a normal sampling rate can take as much as 80 Mbytes of storing space for a whole 24-hour period. This paper describes a simplified implementation of a Discrete Cosine Transform (DCT) algorithm for digital signal compression to be implemented on a Field Programmable Gate Array (FPGA) device. Theoretic compression ratios of 7:1 are expected, enabling the use of portable 16-Mbyte non-volatile memory cards.