Implementation of RNS analysis and synthesis filter banks for the orthogonal discrete wavelet transform over FPL devices

RNS architectures to compute the orthogonal DWT and its inverse are shown. The relation between the coefficients of the analysis and synthesis filters allows one to halve the number of required LUTs and modular adders. Simulations of one- and two- octave implementations using VHDL and FPL devices show a performance advantage of up to 23.45 and 96.58% when compared to the 2's complement arithmetic versions, respectively.