Microelectronics roadmap: from ultimate CMOS to quantum information systems

Summary form only given. The ITRS roadmap shows that scaling efforts will continue to a few tens of nanometers. This paper discusses the ITRS roadmap, leading to the ultimate CMOS and extrapolating to nanoelectronics. The major challenges are the fundamental limit of CMOS scaling and the increased number of global interconnects. Along the path to ultimate CMOS, vertical MOSFET and related devices are discussed. As we approach the nanometer scale, quantum behaviour plays an important role. The question is how to continue Moore's law in increasing functional throughput per unit cost. The paper gives examples for potential off-the-roadmap types of disruptive technologies as a base for discussion. Among these are quantum tunneling devices to increase functional throughput per device. We may also look at alternate architectures such as cellular automata, in which only nearest neighbor interconnects are needed and this type of architecture is most suitable for self-assembly of nanostructures. The self-assembly technique has potential for low cost nanostructure fabrication. Controlled placement of self-organized structures is discussed. In this scheme, semiconductor quantum dots were grown on Si. The dot size, shape and density can be controlled by growth temperature, deposited coverage and doping. Cooperative, well-organized Ge quantum dots were achieved and they offered potential applications of dot arrays for potential cellular systems. Eventually, entirely new massive parallel quantum computation systems may evolve. A possible semiconductor implementation based on SiGe nanostructures is discussed.