Thermal issues in a backwafer contacted silicon-on-glass integrated bipolar process

The electro-thermal behavior of NPNs fabricated in a backwafer contacted silicon-on-glass integrated bipolar process has been investigated experimentally and the results are supported by 2D MEDICI simulations including the lattice heating equation. The devices are fabricated in silicon islands, the smallest of which is 23/spl times/10/spl times/0.94 /spl mu/m/sup 3/. This device exhibits thermal runaway in the Gummel plot at a very low power level of 1.5 mW, where V/sub BE/=0.8 V for V/sub CB/=0 V. A new emitter-current-controlled measurement technique is introduced, whereby the point of thermal runaway can be identified as a flyback point in the I/sub C/-V/sub BE/ characteristics. Calculations are performed to estimate the temperature rise at this point along with the thermal resistance of the device. For the smallest device, the thermal resistance is found to be very high, about 15000 K/W. The thermal stability can be improved by reducing the thermal resistance, which is achieved here by either increasing the size of the silicon island or, more effectively, by adding large areas of metal directly to the device contacts. In all devices studied, the temperature rise at the flyback point was found to be about 25/spl deg/C and not very dependent on the thermal resistance. The collector contact is fabricated on the backwafer directly under the emitter and has a very low series resistance. Increasing this series resistance to values comparable to bulk silicon devices is also shown to reduce the susceptibility to thermal runaway.