CMOS low-noise/driver MMIC amplifiers for 2.4-GHz and 5.2-GHz wireless applications

This paper describes two kinds of on-chip matched low-noise/driver MMIC amplifiers (LN/D-As) suitable for 2.4 GHz and 5.2 GHz short-range wireless applications. The successful use of the current-reuse topology and interdigitated capacitors (IDCs) enables sufficiently low-noise and high output power operations with low current dissipation despite the chip fabrication in a standard bulk CMOS leading to large RF substrate losses. The main measurement results of the two LN/D-As are as follows: a 3.8 dB noise figure (NF) and a 10.1 dB gain under conditions of 1.8 V and 6 mA, a 3.4 dBm 1 dB gain compressed output power (P/sub 1dB/) at 2.4 V and 13 mA for the 2.4-GHz LN/D-A, and a 4.9 dB NF and a 11.1 dB gain with a 1.8 V and 10 mA supply, a 2.3 dBm P/sub 1dB/ at 2.4 V and 16 mA for the 5.2 GHz LN/D-A.