Characterization of Cu extrusion failure mode in dual-damascene Cu/low-k interconnects under electromigration reliability test

With low electrical resistivity and superb electromigration properties relative to Al, Cu is considered an exemplary candidate for metallization in logic devices. The electromigration characteristics, however, are highly contingent upon the test criteria, which in turn vary with the test structure and/or materials, e.g. inter/intra-metal dielectrics. The thermal mismatch stress existing between low-k SiOF and Cu, for instance, degrades the metal adhesion and curtails the device lifetime (Riedel, 1997). Such deleterious stress may also induce an extrusion mode failure, resulting in an unstable EM data with high sigma (Ennis, 2000) and an improper estimation of via lifetime. In this study, we identify a few pertinent factors involved in the formation of Cu extrusion mode failures in a Cu-SiOF dual damascene structure, and propose a possible underlying mechanism. Extrusion-free specimens, i.e. once the problem is eliminated, show an activation energy of about 0.81 eV, and the EM failures are limited to the via regions.