Constant g/sub m/ rail-to-rail CMOS input stage with improved linearity

The classic CMOS differential amplifier has a strong nonlinearity for large values of the input voltage amplitude, so important odd-order distortion will appear for a sinusoidal input voltage. This paper presents a new original technique to improve the linearity of a CMOS differential amplifier by canceling the third and the fifth terms of the Taylor series of the output current. In order to obtain an extended range of the input voltage, two complementary CMOS differential amplifiers are used to achieve a constant transconductance of the input stage for rail-to-rail common mode input voltage, a maximum current selecting circuit is added. SPICE simulation using MOSIS 0.8/spl mu/ confirms the theoretical analysis.