A hardware/software co-design flow and IP library based of Simulink /sup TM/

This paper describes a design flow for data-dominated embedded systems. We use The Mathworks' Simulink/sup TM/ environment for functional specification and algorithmic analysis. We developed a library of Simulink blocks, each parameterized by design choices such as implementation (software, analog or digital hardware, ...) and numerical accuracy (resolution, S/N ratio). Each block is equipped with empirical models for cost (code size, chip area) and performance (timing, energy), based on surface fitting from actual measurements. We also developed an analysis toolbox that quickly evaluates algorithm and parameter choices performed by the designer and presents the results for fast feedback. The chosen block netlist is then ready for implementation, by using a customization of The Mathworks' Real Time Workshop/sup TM/ to generate a VHDL netlist for FPGA implementation, as well as embedded software for DSP implementation.