A deterministic approach to netlist display

The authors describe a totally deterministic approach and a recursive algorithm for generating device-level schematic diagrams, given only the netlist description of the circuit. The new algorithm is superior to previous tools in that (1) it is deterministic (others use heuristics and therefore cannot handle certain problems), (2) it is fast (others are up to 100 times slower), (3) it is technology-independent (others were written for CMOS only), and (4) it can be implemented in an extremely short program (around 1000 lines of C).<
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