A ROM-less direct digital frequency synthesizer using segmented nonlinear digital-to-analog converter

A direct digital frequency synthesizer (DDFS) based on nonlinear digital-to-analog converter (DAC) is presented. A new technique is proposed to segment the nonlinear DAC such that high speed DDFS with low power consumption and small die area can be achieved. The DDFS has 12 bits of phase resolution and 11 bits of magnitude resolution. It was fabricated in a 0.25 /spl mu/m CMOS process with an active area of 1.4 mm/sup 2/. For a clock frequency of 300 MHz, the spurious free dynamic range (SFDR) is better than 50 dB with output frequencies up to 3/8 of the clock frequency.