A simple characterization method for MOS transistor matching in deep submicron technologies

A new and simple four parameter mismatch model is presented for the MOS transistor. This model is extensively tested on a 0.18 /spl mu/m CMOS technology. Bulk bias dependence is modeled physically and no extra parameter is needed for long channel transistors. The repeatability of the measurement system and parameter extraction has been investigated. It is shown that for the measurement set-up and test structures, measurements in the linear region are affected by contact resistance variation for devices broader than 4 /spl mu/m.